May 23 - 27, 2011 San Jose, CA
COURSE DESCRIPTION The Semiconductor Technology Seminar is an intensive five days training course that addresses the needs of scientists, engineers, and technicians newly involved in design, development, testing, production, management, procurement or evaluation of semiconductors. While the course will add to the knowledge and understanding of experienced technologists it is an essential course for all new entries into the industry. This training seminar covers modern semiconductor processes in sub-micron CMOS, BICMOS and bipolar, from a historical perspective. The course systematically reduces semiconductor theory to current practice through the use of visual examples and design graphics in basic materials, production processing and device operation. The impact of processing on yield, performance, and reliability issues is explored throughout the course. Emphasis is on imparting to the student an experience and understanding of the fundamental process and device concepts essential to the development of a productive career in the industry. The expanded 7th edition of the Semiconductor Technology Handbook includes a comprehensive set of tables, graphs, nomographs, and exercises that apply to situations of frequent concern to semiconductor technologists. The Handbook provides a focus for the lectures and work sessions during the seminar and serves as a valuable permanent reference. Both the Semiconductor Technology Course and Handbook have been a “standard” in the industry for many years. The authors of the handbook are the course instructors. Larry Lopp COURSE SCHEDULE FIRST DAY Introduction: Overview of semiconductor industry, contemporary CMOS process flow with cross sections, Semiconductor Technology Roadmap. Yield: Global sales data, wafer yield models and market dynamics. Silicon Materials: Silicon purification and single crystal growth, wafer manufacture and gettering processes. Cleaning & Oxidation process: Cleaning effects, dry & wet growth kinetics, multiple step, HCL, pressure enhanced, oxide isolation technology, oxide thickness control and determination, dopant redistribution, oxidation of Si3N4. |
SECOND DAY Cleaning & Oxidation process: (Continued)
THIRD DAY CVD: Epitaxial Si, polycrystalline Si, oxides, nitrides, metals, silicides films. Atmospheric, low pressure, plasma enhanced processes. Measurements techniques. Shallow trench using CVD & CMP. FOURTH DAY Diodes: Junction diodes, diode characteristics, abrupt junction, electric field and potential distribution, voltage breakdown, switching, leakage currents. Schottky diodes.
FIFTH DAY CMOS: Isolation technology, DRAM principles, ionizing radiation, scaling rules & impact, EPROMS, EEPROMS, flash memories, DMOS. |
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